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CSEN=DIV16, LEUART0=DIV1, SYSTICK=DIV1
Description
Low Frequency B Prescaler Register 0 (Async Reg)
Fields
| SYSTICK | 0 (DIV1): LFBCLKSYSTICK = LFBCLK
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| LEUART0 | Low Energy UART 0 Prescaler
0 (DIV1): LFBCLKLEUART0 = LFBCLK
1 (DIV2): LFBCLKLEUART0 = LFBCLK/2
2 (DIV4): LFBCLKLEUART0 = LFBCLK/4
3 (DIV8): LFBCLKLEUART0 = LFBCLK/8
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| CSEN | Capacitive touch sense module Prescaler
0 (DIV16): LFBCLKCSEN = LFBCLK/16
1 (DIV32): LFBCLKCSEN = LFBCLK/32
2 (DIV64): LFBCLKCSEN = LFBCLK/64
3 (DIV128): LFBCLKCSEN = LFBCLK/128
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